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chr3894 - qeg ref. : dschr3894 - qeg2201 - 19 jul 12 1 / 14 specifications subject to change without notice united monolithic semiconductors s.a.s. bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 37 - 40ghz integrated down converter gaas monolithic microwave ic in smd leadless package description the chr3894 - qeg is a multifunction monolithic receiver, which integrates a balanced cold fet mixer, a lo chain with buffers associated to a time two multiplier, and a rf low noise amplifier including gain control. it is d esigned for a wide range of applications, from military to commercial communication systems. the circuit is manufactured with a phemt process, 0.15m gate length, via holes through the substrate, air bridges and electron beam gate lithography. it is suppl ied in rohs compliant smd package. main features broadband performances: 37 13db conversion gain 15dbc image rejection 2dbm iip3 without attenuation (gc= 8db gain control range 4db noise figure for if>0.1ghz 0dbm lo input dc bias: vd=4v @ id=250ma 24l msl1 main electrical characteristics tamb.= +25c symbol parameter min typ max unit f rf rf frequency range 37 40 ghz f lo lo frequency range 17.5 21.0 db f if if frequency range dc 3.5 db g conversion gain without attenuation 10 13 dbm 0 2 4 6 8 10 12 14 16 18 20 35 36 37 38 39 40 41 conversion gain (db) rf frequency (ghz) conversion gain (usb mode) @ if 2ghz - 2v - 0.4v - 0.2v 0v +0.6v ums r3894 yyww ?? ?? ??
chr3894 - qeg 37 - 40ghz integrated down converter ref. : dschr3894 - qeg2201 - 19 jul 12 2 / 14 specifications subject to change without notice bat. ch armille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 electrical characteristics tamb.= +25c, vd = vd1 = +4v (1) symbol parameter min typ max unit f rf rf frequency range 37 40 ghz f lo lo frequency range 17.5 21.0 ghz f if if frequency range dc 3.5 ghz g conversion gain without attenuation (2) 10 13 db g gain control range 8 db nf noise figure for if>0.1ghz 4 4.5 db im_rej image rejection (2) 12 15 dbc p lo lo input power 0 dbm iip3 input ip3 without attenuation 0 2 dbm iip3 input ip3 @ all attenuations - 2 0 dbm lo rl lo return loss - 12 db rf rl rf return loss - 7 db vgl lna dc gate voltage - 0.1 v vgx multiplier dc gate voltage - 0.9 v gc gain control dc voltage - 2 +0.6 v idt total drain current (id+id1) (3) 250 ma these values are representative of onboard measurements as defined on the drawing in paragraph "evaluation mother board". (1) vd: lo - chain drain bias voltage. vd1: lna drain bias voltage. (2) an external combiner 90 is required on i / q. (3) id: lo - ch ain drain current, typically 125ma. (3) id1: lna drain current, typically 125ma, should be tuned with vgl. note: the total current (idt) is not affected by the gain control voltage (gc). electrostatic discharge sensitive device observe handling precautions!
37 - 40ghz integrated down converter chr3894 - qeg ref. : dschr3894 - qeg2201 - 19 jul 12 3 / 14 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel .: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 absolute maximum ratings (1) tamb.= +25c symbol parameter values unit vd, vd1 drain bias voltages 4.5v v idt drain bias current 340 ma vgl, vgx gate bias voltages - 2 to +0.4 v gc gain control voltage - 2.5 to +0.8 v p_rf maximum peak input power overdrive (2) +15 dbm p_lo maximum lo input power +15 dbm tj junction temperature (2) 175 c ta operating temperature range - 40 to +85 c tstg storage temperature range - 55 to +150 c (1) operation of this device above anyone of these parameters may cause permanent damage. (2) duration < 1s. typical bias conditions tamb.= +25c symbol pad n o parameter values unit vd1, vd 10, 11 dc drain voltages (lna and lo - chain) 4 v id1 10 lna drain current controlled with vgl 125 ma vgl 9 lna dc gate voltage - 0.1 v vgx 12 multiplier dc gate voltage - 0.9 v gc 8 gain control dc voltage - 2 to 0.6 v
chr3894 - qeg 37 - 40ghz integrated down converter ref. : dschr3894 - qeg2201 - 19 jul 12 4 / 14 specifications subject to change without notice bat. ch armille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 device thermal performances all the figures given in this section are obtained assuming that the qfn device is cooled down only by conduction through the package thermal pad (no convection mode considered). the temperature is monitored at the package back - side interface (tcase) as shown below. the system maximum temperature must be adjusted in order t o guarantee that tcase remains below than the maximum value specified in the next table. so, the system pcb must be designed to comply with this requirement. a derating must be applied on the dissipated power if the tcase temperature can not be maintained below than the maximum temperature specified (see the curve pdiss. max) in order to guarantee the nominal device life time (mttf). 150 c recommended max. junction temperature (tj max) : 147 c junction temperature absolute maximum rating : 175 c max. continuous dissipated power @ tcase= 85 c : 0.51 w => pdiss derating above tcase (1) = 85 c : 8 mw/c junction-case thermal resistance (rth j-c) (2) : <122 c/w min. package back side operating temperature (3) : -40 c max. package back side operating temperature (3) : 85 c min. storage temperature : -55 c max. storage temperature : 155 c (1) derating at junction temperature constant = tj max (2) rth j-c is calculated for a worst case where the hotter junction of the mmic is considered. (3) tcase=package back side temperature measured under the die-attach-pad (see the drawing below). 5.8 device thermal specification : CHR3894-QEG 0 0.1 0.2 0.3 0.4 0.5 0.6 -50 -25 0 25 50 75 100 125 tcase (c) pdiss. max. (w) pdiss. max. (w) tcase example of qfn 16l 3x3 back-side view, temperature reference point (tcase) location.
37 - 40ghz integrated down converter chr3894 - qeg ref. : dschr3894 - qeg2201 - 19 jul 12 5 / 14 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel .: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical board measurements tamb.= +25c, vd = vd1 =+4v, vgl = - 0.1v, vgx = - 0.9v, p_lo = 0dbm (idt = 250ma) these values are representative of onboard measurements as defined on the drawing in paragraph "evaluation mother board". data given in the package access planes. conversion gain versus rf & if frequency (usb & lsb modes) without attenuation: gc= - 2v conversion gain versus rf frequency and gain control voltage (if 2ghz, usb mode) 0 2 4 6 8 10 12 14 16 18 20 35 36 37 38 39 40 41 conversion gain (db) rf frequency (ghz) lsb - 2ghz usb - 2ghz lsb - 3.5ghz usb - 3.5ghz 0 2 4 6 8 10 12 14 16 18 20 35 36 37 38 39 40 41 conversion gain (db) rf frequency (ghz) - 2v - 0.4v - 0.2v 0v +0.6v
chr3894 - qeg 37 - 40ghz integrated down converter ref. : dschr3894 - qeg2201 - 19 jul 12 6 / 14 specifications subject to change without notice bat. ch armille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical board measurements tamb.= +25c, vd = vd1 = +4v, vgl = - 0.1v, vgx = - 0.9v, p_lo = 0dbm (idt = 250ma) noise figure versus rf frequency at if 2ghz (usb & lsb modes) without attenuation: gc= - 2v noise figure versus gain control range (if 2ghz, usb mode) 0 1 2 3 4 5 6 7 8 9 10 35 36 37 38 39 40 41 42 noise figure (db) rf frequency (ghz) usb lsb 0 1 2 3 4 5 6 7 8 9 10 35 36 37 38 39 40 41 42 noise figure (db) rf frequency (ghz) - 2v - 0.2v 0v +0.6v
37 - 40ghz integrated down converter chr3894 - qeg ref. : dschr3894 - qeg2201 - 19 jul 12 7 / 14 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel .: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical board measurements tamb.= +25c, vd = vd1 = +4v, vgl = - 0.1v, vgx = - 0.9v, p_lo = 0dbm (idt = 250ma) image rejection versus rf frequency at if 2ghz (usb & lsb modes) without attenuation: gc= - 2v return losses (lo & rf) versus frequency and gain control voltage 0 4 8 12 16 20 24 28 32 36 40 44 35 36 37 38 39 40 41 image rejection (dbc) rf frequency (ghz) usb lsb -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 0 5 10 15 20 25 30 35 40 45 frequency (ghz) lo & rf return losses (db) rf @ gc=-2v rf @ gc=0.6v lo
chr3894 - qeg 37 - 40ghz integrated down converter ref. : dschr3894 - qeg2201 - 19 jul 12 8 / 14 specifications subject to change without notice bat. ch armille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical board measurements tamb.= +25c, vd = vd1 = +4v, vgl = - 0.1v, vgx = - 0.9v, p_lo = 0dbm ( idt = 250ma) input ip3 vs rf frequency at if 3.5ghz without attenuation: gc= - 2v imd3 vs rf frequency at if 3.5ghz without attenuation: gc= - 2v input ip3 vs gain control at 38.5ghz input ip3 vs temperature at 38.5ghz without attenuation: gc= - 2v -6 -4 -2 0 2 4 6 8 10 -24 -22 -20 -18 -16 -14 -12 -10 input power dcl (dbm) iip3 (dbm) 37.5ghz 38.5ghz 39.5ghz 40.5ghz 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 -24 -22 -20 -18 -16 -14 -12 -10 input power dcl (dbm) imd3 (dbc) 37.5ghz 38.5ghz 39.5ghz 40.5ghz -6 -4 -2 0 2 4 6 8 10 -24 -22 -20 -18 -16 -14 -12 -10 input power dcl (dbm) iip3 (dbm) -2v -0.5v -0.4v 0v +0.6v -6 -4 -2 0 2 4 6 8 10 -24 -22 -20 -18 -16 -14 -12 -10 input power dcl (dbm) iip3 (dbm) 85c 25c -40c
37 - 40ghz integrated down converter chr3894 - qeg ref. : dschr3894 - qeg2201 - 19 jul 12 9 / 14 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel .: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical board measurements tamb = +25c, tcold = - 40c, thot = +85c vd = vd1 = +4v, vgl = - 0.1v, vgx = - 0.9v, p_lo = 0dbm conversion gain versus temperature at if 2ghz (usb mode) without attenuation: gc= - 2v noise figure versus temperature at if 2ghz (usb mode) without attenuation: gc= - 2v 4 6 8 10 12 14 16 18 20 22 24 35 36 37 38 39 40 41 rf frequency (ghz) conversion gain (db) 85c 25c -40c 0 1 2 3 4 5 6 7 8 9 10 35 36 37 38 39 40 41 42 noise figure (db) rf frequency (ghz) 85 c 25 c - 40 c
chr3894 - qeg 37 - 40ghz integrated down converter ref. : dschr3894 - qeg2201 - 19 jul 12 10 / 14 specifications subject to change without notice bat. ch armille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 package outline (1) matt tin, lead free (green) 1 - nc 9 - vgl 17 - gnd (2) units : mm 2 - nc 10 - vd1 18 - nc from the standard : jedec mo - 220 3 - nc 11 - vd 19 - nc (vggd) 4 - gnd (2) 12 - vgx 20 - if_i 25 - gnd 5 - rf in 13 - nc 21 - gnd (2) 6 - gnd (2) 14 - nc 22 - if_q 7 - nc 15 - gnd (2) 23 - nc 8 - gc 16 - lo in 24 - nc (1) the package outline drawing included to this data - sheet is given for indication. refer to the application note an0017 ( http://www.ums - gaas.com ) for exact package dimensions. (2) it is strongly recommended to ground all pins marked gnd through the pcb board. ensure that the pcb board is designed to provide the best possible ground to the package.
37 - 40ghz integrated down converter chr3894 - qeg ref. : dschr3894 - qeg2201 - 19 jul 12 11 / 14 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel .: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 evaluation mother board compatible with the proposed footprint. based on typically ro4003 / 8mils or equivalent. using a micro - strip to coplanar transition to access the package. recommended for the implementation of this prod uct on a module board. decoupling capacitors of 10nf 10% are recommended for all dc accesses. see application note an0017 for details. hybrid coupler 90 for 2 - 4ghz. if_i if_q rf in lo in if_i if_q rf in lo in
chr3894 - qeg 37 - 40ghz integrated down converter ref. : dschr3894 - qeg2201 - 19 jul 12 12 / 14 specifications subject to change without notice bat. ch armille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 notes due to esd protection circuits on rf input and output, an external capacitance might be requested to isolate the product from external voltage that could be present on the rf accesses. esd protections are also implemented on gate and control accesses. the dc connections do not include any decoupling capacitor in package, therefore it is mandatory to provide a good external dc decoupling (10nf) on the pc board, as close as possible to the package. rf in gnd if_q if_i nc vd1 nc gc vgl vd vgx 20 22 23 21 24 1 2 3 4 5 6 8 9 10 11 12 14 15 16 17 18 19 7 13 x2 lo in gnd nc nc nc gnd gnd nc nc gnd nc nc nc rf in gnd if_q if_i nc vd1 nc gc vgl vd vgx 20 22 23 21 24 1 2 3 4 5 6 8 9 10 11 12 14 15 16 17 18 19 7 13 x2 lo in gnd nc nc nc gnd gnd nc nc gnd nc nc nc
37 - 40ghz integrated down converter chr3894 - qeg ref. : dschr3894 - qeg2201 - 19 jul 12 13 / 14 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel .: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 dc schematic lna: 4v, 125ma lo chain: 4v, 125ma 27 vgl# - 0.1v 2k 53ma 34 43ma vd1 10ma 150 576 1.9k 15 1k 5k rf x4 15ma 90 444 1.6k 15 2k 1k x4 gc 1k 27 vgl# - 0.1v 2k 2k 53ma 34 43ma vd1 10ma 150 150 576 1.9k 15 1k 5k rf x4 x4 15ma 90 90 444 1.6k 15 2k 1k x4 x4 gc 1k 2k 200 185 30 16 vd 45ma 25ma @pin=0dbm 50ma lo vgx= - 0.9v 26 18 800 70 mixer gate 700 515 515 x2
chr3894 - qeg 37 - 40ghz integrated down converter ref. : dschr3894 - qeg2201 - 19 jul 12 14 / 14 specifications subject to change without notice bat. ch armille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 recommended package footprint refer to the application note an0017 available at http://www.ums - gaas.com for package foot print recommendations. smd mounting procedure for the mounting process standard techniques involving solder paste and a suitable reflow process can be used. for further details, see application note an0017. recommended environmental management ums products are compliant with the regulation in particular with the directives rohs n2011/65 and reach n19 07/2006. more environmental data are available in the application note an0019 also available at http://www.ums - gaas.com . recommended esd management refer to the application note an0020 available at http://www.ums - gaas.com for esd sensitivity and handling recommendations for the ums package products. ordering information qfn 4x4 package: chr3894 - qeg /xy stick: xy = 20 tape & reel: xy = 21 information furnished is believed to be accurate and reliable. however united monolithic semiconductors s.a.s. assumes no responsibility for the consequences of use of such information nor for any infringement of pate nts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of united monolithic semiconductors s.a.s. . specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. united monolithic semiconductors s.a.s. products are not authorised for use as critical components in life support devices or systems without express writt en approval from united monolithic semiconductors s.a.s.

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